Title:
MOUNTING STRUCTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0574776
Kind Code:
A
Abstract:
PURPOSE: To obtain a semiconductor chip mounting structure which is simplified in structure, lessened in manufacturing and assembling processes in number, enhanced in yield, lessened in production cost, and reduced in size.
CONSTITUTION: A coating 3 of silicon oxide of silicon nitride is formed on the upside 1A of an Si semiconductor chip 1, the underside 1B, and the side face 1C, an insertion hole 3a is provided to the coat 3a formed on upside 1A at a prescribed position corresponding to the electrode 11 of the semiconductor chip, and a solder bump 2 is mounted on the insertion hole, and the lead-out electrode of the semiconductor device 1 is formed.
Inventors:
TSUKAMOTO KENICHI
FUKUMOTO KOJI
OIZUMI MASAYASU
ASARI NORIKATSU
ICHIKAWA HIROSHI
FUKUMOTO KOJI
OIZUMI MASAYASU
ASARI NORIKATSU
ICHIKAWA HIROSHI
Application Number:
JP23444691A
Publication Date:
March 26, 1993
Filing Date:
September 13, 1991
Export Citation:
Assignee:
HITACHI LTD
HITACHI VLSI ENG
HITACHI VLSI ENG
International Classes:
H01L21/60; H01L21/321; H01L23/12; H01L23/29; H01L23/31; (IPC1-7): H01L21/321; H01L21/60; H01L23/12; H01L23/29; H01L23/31
Attorney, Agent or Firm:
Ogawa Katsuo
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