Title:
MULTI-CPU SYSTEM
Document Type and Number:
Japanese Patent JPH01209562
Kind Code:
A
Abstract:
PURPOSE:To obtain a multi-CPU system that can secure a satisfactory distance between CPUs by transferring serial data between the CPUs. CONSTITUTION:A data collecting CPU 3 outputs a control signal to a selection means 2 for selection of a CPU 1a, for example, among those CPU 1a-1c, etc., for monitor and control of each device. Thus necessary data are transmitted to and received from the CPU 1a. Then the CPU 3 sends the control signal to the means 2 again for selection of the next CPU 1b, for example, and performs the transfer of data to the CPU 1b. Such actions are repeated so that the transfer of data is possible with use of the serial signal in a multi-CPU system. As a result, any bus is not required for connection between the CPUs and each function block can be freely set.
Inventors:
SHINOZAKI YUTAKA
Application Number:
JP3401488A
Publication Date:
August 23, 1989
Filing Date:
February 18, 1988
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F15/16; G06F15/163; G06F15/177; H04L13/00; H04L29/10; (IPC1-7): G06F15/16; H04L13/00
Attorney, Agent or Firm:
Yoshiyuki Osuge (2 outside)