PURPOSE: To reduce number of components of a multi-frame counter by utilizing idle circuits representing a fraction of a carry circuit of a unit counter of the frame counter for the count of the multi-frame counter.

CONSTITUTION: The frame counter 1 gives outputs QB-QD of circuits of a required number (b) among α sets of idle circuits of the final unit counter 1a to relevant input terminals B-D. Thus, the final unit counter 1a holds the count of the preceding frame, and a prescribed number 2b of the counts of one frame unit are outputted from the idle circuits of the required number (b) to obtain an output of the multi-frame counter counting the multi-frames comprising b-frames. Thus, b-set of idle circuits among α sets of idle circuits of the final unit counter 1a of plural unit counters 11-1a being components of the frame counter 1 are utilized to output the count output by one multi-frame comprising frames of the prescribed number 2b. Thus, the idle circuits of the final unit counter 1a of the frame counter 1 are used effectively and number of components is reduced.