Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTI-FRAME SYNCHRONIZATION PROTECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH0787076
Kind Code:
A
Abstract:

PURPOSE: To recognize multi-frame synchronization without a delay in protection of multi-frame synchronization even for an optional number of backward protection stages with respect to the multi-frame synchronization protection circuit.

CONSTITUTION: The multi-frame synchronization protection circuit having a comparator circuit 2, a shift circuit 4 having a shift stage number required for forward and backward protection, and an alarm generating circuit 6 providing an output of an alarm signal is response to each forward protection output signal is characterized to be provided with a 1st circuit 8 outputting an output signal of the comparator circuit 2 to an input of a 1st shift stage, a 2nd circuit 10 outputting an output signal of the comparator circuit 2 only when the alarm signal is generated from the alarm generating circuit 6, and a 3rd circuit 12 applying the output signal of the forward protection of the 1st shift stage and an output signal of the 2nd circuit 10 to an input of a 2nd shift stage of the shift circuit 4.


Inventors:
KOZUKI TOSHIAKI
SAITO TAKESHI
Application Number:
JP22542893A
Publication Date:
March 31, 1995
Filing Date:
September 10, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
International Classes:
H04J3/06; H04L7/08; (IPC1-7): H04L7/08; H04J3/06
Attorney, Agent or Firm:
Furuya Fumio (1 person outside)



 
Next Patent: DATA CIPHERING DEVICE