Title:
多入力一出力回路及び表示装置
Document Type and Number:
Japanese Patent JP5273377
Kind Code:
B2
Abstract:
A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
Inventors:
Hiroko Sefu
Koichi Kodera
Yoshihiro Kotani
Shuichiro Matsumoto
Koichi Kodera
Yoshihiro Kotani
Shuichiro Matsumoto
Application Number:
JP2009068117A
Publication Date:
August 28, 2013
Filing Date:
March 19, 2009
Export Citation:
Assignee:
Japan Display Co., Ltd.
Panasonic LCD Display Co., Ltd.
Panasonic LCD Display Co., Ltd.
International Classes:
H03F3/34; G02F1/133; G09G3/20; H03F3/45; G09G3/36
Domestic Patent References:
| JP10284984A | ||||
| JP2006197532A | ||||
| JP2003318676A | ||||
| JP7235840A | ||||
| JP993052A | ||||
| JP2000156616A | ||||
| JP2009225457A | ||||
| JP964746A |
Attorney, Agent or Firm:
Haruka International Patent Office
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