MULTICHANNEL ANALOG-TO-DIGITAL CONVERTER

Japanese Patent JPH03183214

A

PURPOSE: To form an interface on a single chip by mounting an ADC on a single chip by the use of a compact and low power ADC array and a register to transfer digital data to an output part and forming throughput similar to that of a high speed single ADC. CONSTITUTION: A control logic device 20 receives a clock and a start/stop synchronizing signal and provides signals for various analog channels 10 and shift registers 18, external synchronizing signal and a stop strobe. The output port of a shift register is connected to an output buffer 23, which sends a signal to an external bus. On-chip bias generators 22A, 22B apply bias voltage to the analog channels 10. Since each ADC 16 in each analog channel 10 includes an ADC capacitor array to be the maximum single element in the channel 10, 64 ADCs are integrated on the same chip by minimizing the size of the array.

JPH0613231	[Name of device] Digital / analog converter
JPS5985127	ANALOG-DIGITAL CONVERTER
WO/2003/063160	METHOD AND UNIT FOR SUBSTRACTING QUANTIZATION NOISE FROM A PCM SIGNAL

RICHIYAADO HAARAN BURUUSU
AREN JIERARUDO RUISU
DANIERU SENDAROUITSUTSU

JP24601790A

August 09, 1991

September 14, 1990

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XEROX CORP

H03M1/08; H01L27/08; H03M1/12; H03M1/46; H03M1/80; (IPC1-7): H03M1/08; H03M1/12

JPS5337345A	1978-04-06
JP54009651B
JPS562730A	1981-01-13
JPS60160222A	1985-08-21
JPS6260316A	1987-03-17
JPH01117422A	1989-05-10
JPS6444131A	1989-02-16
JPS6037828A	1985-02-27
JPS587920A	1983-01-17

Minoru Nakamura (7 outside)

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