Title:
MULTIFRAME MONITOR SYSTEM
Document Type and Number:
Japanese Patent JP3416394
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the hard quantity of a monitor circuit at the time of executing the multiframe monitoring of many channels at the same time in communication of a time division multi-transmitter by multi-frame constitution.
SOLUTION: Multiframe monitoring one channel is executed for multiframe synchronization by a frame bit and the bit collation of bits except for it at the same time to eliminate a multiframe synchronizing detector. In addition, pattern matching operation is executed by each frame to transit to a high-order level to reduce a comparator 14. In addition by sharing the frame comparing circuit 14 when monitoring data of one frame is equal and reducing monitoring circuits when the reception of information under monitoring can be recognized, the comparator 14 is reduced. In.addition by making it possible to set a reference pattern 13 by software, the reference pattern 13 can be changed to unnecessitate all the reference patterns by hardware.
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Inventors:
Nobuo Ito
Hiroshi Masukawa
Takeshi Miyasaka
Hiroshi Masukawa
Takeshi Miyasaka
Application Number:
JP13515896A
Publication Date:
June 16, 2003
Filing Date:
May 29, 1996
Export Citation:
Assignee:
株式会社日立製作所
日本電信電話株式会社
日本電信電話株式会社
International Classes:
H04J3/06; H04L7/00; H04L7/08; (IPC1-7): H04J3/06; H04L7/00; H04L7/08
Domestic Patent References:
| JP5122188A | ||||
| JP5276153A | ||||
| JP5175956A | ||||
| JP2250440A | ||||
| JP2246436A | ||||
| JP1276839A |
Attorney, Agent or Firm:
Kiyoshi Maruyama (5 others)