Title:
積層セラミックキャパシタ
Document Type and Number:
Japanese Patent JP7168396
Kind Code:
B2
Abstract:
A multilayer ceramic capacitor includes a ceramic body with first and second internal electrodes facing each other and dielectric layers interposed therebetween. First and second external electrodes are on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. A dielectric layer includes dielectric grains including, respectively, first regions in which dysprosium (Dy) is not present and second regions surrounding the first regions. Where a shortest distance between boundaries of the first regions (in which dysprosium (Dy) is not present) of two of the dielectric grains is “L,” the concentration of dysprosium (Dy) in a region within ±0.2 L from a halfway point between the boundaries is lower than that of dysprosium (Dy) in the second regions.
Inventors:
Kwon, Hyun Seung
Cha, Kyung Jin
Jo, Ji Hong
Cha, Kyung Jin
Jo, Ji Hong
Application Number:
JP2018180387A
Publication Date:
November 09, 2022
Filing Date:
September 26, 2018
Export Citation:
Assignee:
Samsung Electro-Mechanics Company Limited.
International Classes:
H01G4/30
Domestic Patent References:
JP2016115876A | ||||
JP2008222520A | ||||
JP2013136501A | ||||
JP2003077754A | ||||
JP2012193072A |
Attorney, Agent or Firm:
Patent Attorney Corporation RYUKA International Patent Office
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