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Title:
MULTILAYER CIRCUIT BOARD, METHOD OF PROCESSING BLIND HOLE THEREIN AND PROBE FOR MEASUREMENT
Document Type and Number:
Japanese Patent JP2004063771
Kind Code:
A
Abstract:

To provide a method of processing a blind hole in a multilayer circuit board which allows easy confirmation of the location of an inner layer and can increase the processing accuracy, and also to provide the multilayer circuit board and a probe for inspection.

Conductor layers 31 of the multilayer circuit board 30 are insulated from each other with insulation layers 32. To each conductor section for a circuit which is to be used as a circuit when the multilayer circuit board 30 becomes a product, a measurement region 31b which is only used for processing is connected. The measurement regions 31b of various layers are aligned horizontally and are so located as to overlap each other in the up and down direction. Prior to processing holes, a V-shaped hole 70 is processed in a place where the measurement regions 31b are located, and the probes 50 for measurement are located in the measurement regions 31b exposed on an inner surface of the hole 70. By measuring the voltages between the probe needles 51 and a rotor shaft, the position of a drill end is controlled.


Inventors:
Yuki, Toru
Otani, Tamio
Ito, Yasushi
Application Number:
JP2002000219967
Publication Date:
February 26, 2004
Filing Date:
July 29, 2002
Export Citation:
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Assignee:
HITACHI VIA MECHANICS LTD
International Classes:
B23Q17/22; B23B35/00; B23B41/00; B23B49/00; H05K3/00; H05K3/46; B23Q17/22; B23B35/00; B23B41/00; B23B49/00; H05K3/00; H05K3/46; (IPC1-7): H05K3/46; B23B41/00; B23B49/00; B23Q17/22; H05K3/00