PURPOSE: To reduce voids generated by electromigration in the vicinity of interface of the first and second wiring layers in a multilayer interconnection structure of an integrated circuit.

CONSTITUTION: After a layer insulating film 16 having a connecting hole 16A is formed covering a first wiring layer 14 consisting of aluminum or aluminum alloy, a second wiring layer 18 consisting of aluminum or aluminum alloy is formed so that it is connected to the first wiring layer 14 via the connecting hole 16A. At the time of forming the second wiring layer 18, in the vicinity of interface between the wiring layers 14, 18 corresponding to the line S-S', grain G2 of the wiring layer 18 is grown continuously to the grain G1 of the wiring layer 14 appearing in the interface in such a size as almost equal to the appearing portion of the grain G1. For this purpose, for example, it is required to adequately control the sputter etching condition of the wiring layer surface within the connecting hole 16A and the sputtering condition of aluminum or aluminum alloy of the wiring layer 18.