Title:
MULTILAYER INTERCONNECTION STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS6079748
Kind Code:
A
Abstract:
PURPOSE:To prevent heat generation due to current by a method wherein a through hole, whose periphery has been roughened, is provided in a second insulating film on a first electrode and a second electrode, which contacts with the first electrode through the through hole and is extendedly provided on the second insulating film, is provided. CONSTITUTION:Plural elements 2 are formed in a semiconductor substrate 1 and a first insulating film 3 is provided thereon. Furthermore, a first electrode 4, which contacts to a desired region of the elements 2 and is extendedly provided on the first insulating film 3, is provided. Then, a second insulating film 5, with which the first insulating film 3 and the first electrode 4 are covered, is provided. A through hole 6, whose periphery has been roughened, is provided in the second insulating film 5 on the first electrode 4 and a second electrode 7, which contacts with the first electrode 4 through the through hole 6 and is extendedly provided on the second insulating film 5, is provided.
Inventors:
ASANO TETSUO
ONOZATO NOBUO
ONOZATO NOBUO
Application Number:
JP18806883A
Publication Date:
May 07, 1985
Filing Date:
October 06, 1983
Export Citation:
Assignee:
SANYO ELECTRIC CO
TOKYO SANYO ELECTRIC CO
TOKYO SANYO ELECTRIC CO
International Classes:
H01L23/522; H01L21/768; (IPC1-7): H01L21/88
Domestic Patent References:
| JPS4712926A | ||||
| JPS4743996A |
Attorney, Agent or Firm:
Takuji Nishino (2 outside)