To provide a multilayer printed circuit board which effectively prevents the potential fluctuation of a power terminal of a semiconductor device, i.e., a noise from flowing out to a base power wiring.
The multilayer printed circuit board includes a first power via 8 which is connected to a power terminal 21 of a semiconductor integrated circuit 5 on a first surface layer 12, and penetrates the first surface layer 12 and a second surface layer 13; a ground via which is connected to a ground conductive layer 7, penetrates the ground conductive layer 7 and the second surface layer 13, and is connected to the first power via 8 via a bypass capacitor 3 on the second surface layer 13; a first clearance hole 17 formed on a power conductor layer; and a second clearance hole 22 formed on the ground conductive layer 7. The first clearance hole 17 is formed to be larger than the second clearance hole 22.
Shiro Takayanagi
Yasuhiro Otsuka
Shuji Kimura
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