Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTILAYER WIRING SUBSTRATE
Document Type and Number:
Japanese Patent JP2006210473
Kind Code:
A
Abstract:

To provide a multilayer wiring substrate in which a surface flatness is good and which is excellent in electric characteristic and conduction reliability.

In the multilayer wiring substrate, a resin insulating layer 4 and a wiring conductor layer 5 are alternately laminated on the wiring board 1 having a conductor layer 3 on a top surface. The multilayer wiring substrate connects the wiring conductor layer 5 and the conductor layer 3 electrically via a through-conductor 6 in the resin insulating layer 4 between the wiring conductor layer 5 located up and the conductor layer 3 located down. The wiring board 1 is constituted of an insulating substrate 2, a resin coating layer 10 having a through-hole and stuck directly on the substrate 2, and the conductor layer 3 provided so as to bury the through-hole. The conductor layer 3 is composed of a main conductor, and a ground conductor with the coefficient of thermal expansion smaller than the main conductor covering continuously the side face and the bottom.


Inventors:
OYAMADA TAKESHI
Application Number:
JP2005017864A
Publication Date:
August 10, 2006
Filing Date:
January 26, 2005
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
KYOCERA CORP
International Classes:
H05K3/46; G01R1/073; H01L21/66; H01L23/12
Domestic Patent References:
JPH0383398A1991-04-09
JPH06505833A1994-06-30
JPH0653332A1994-02-25
JP2004327715A2004-11-18
JPH06112630A1994-04-22
JPH036893A1991-01-14
JP2002246744A2002-08-30
JPH03297191A1991-12-27