Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTILAYERED CERAMIC WIRING BOARD
Document Type and Number:
Japanese Patent JP2000031328
Kind Code:
A
Abstract:

To provide a multilayered ceramic wiring board in which the occurrence of warps is suppressed, though the board incorporates a capacitor near its IC chip mounting surface.

A multilayered alumina ceramic wiring board having a front surface 100a, which is formed as an IC chip mounting surface and a rear surface 100b, incorporates a capacitor 10 composed of molybdenum-added dielectric layers 11-14 and electrode layers 21-25 which are formed in square shapes on nearly the whole upper and lower surfaces of the layers 11-14 by integral sintering and composed mainly of tungsten near the front surface 100a, and is provided with a conductor layer 61 made of the same material composed mainly of tungsten as that of the electrode layers 21-25 near the rear surface 100b. Even when the coefficients of firing shrinkage of ceramic layers 1-5 are different from those of the electrode layers 21-25, the conductor layer 6 having nearly the same coefficient of firing shrinkage as the electrode layer 21, etc., has is formed on the rear surface side.


Inventors:
ASAI KOICHI
OGAWA MASAHIRO
Application Number:
JP19993298A
Publication Date:
January 28, 2000
Filing Date:
July 15, 1998
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NGK SPARK PLUG CO
International Classes:
H05K3/46; H01L23/12; H01L23/13; (IPC1-7): H01L23/12; H01L23/13; H05K3/46
Attorney, Agent or Firm:
Okuda Makoto (2 outside)