To provide a phase change memory device and a reading method thereof.
This phase change memory device includes: a plurality of main cells programmed to have any one out of a plurality of resistance states corresponding to each of multi-bit data; a plurality of reference cells programmed to have at least two different resistance states among a plurality of the resistance states each time the main cells are programmed; and a reference voltage generation circuit which generates the reference voltage for sensing a plurality of reference cells, and identifying each of the plurality of the resistance states. The phase change memory device improves reliability of read operation while the resistance values of the phase change substance changes with time.
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro
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