Title:
MULTIPLE COMPUTER SYSTEM
Document Type and Number:
Japanese Patent JPS57109080
Kind Code:
A
Abstract:
PURPOSE:To operate a system smoothly by preventing a serious fault by changing the combination of the partial charging functions of respective series of a multiple system, which is not permitted, into the combination which is permitted by prescribed algorithm. CONSTITUTION:A CPU and local memories with monitoring programs 2a-2 and 2b-2 are provided, and they are in partial charge of functions. In a shared memory 5 connected to the CPU and memories 2a and 2b, the present operation modes MV-1 and MV-2 of the 1st and 2nd systems and the last operation modes MO-1 and MO-2 are hld. The contents of the memory 5 are monitored by the programs 2a-2 and 2b-2 in the memories 2a and 2b and when the combination of the operation modes is not permitted, the sequences are returned to the last modes MO-1 and MO-2 in permitted combination to prevent a serious fault, operating the system smoothly.
More Like This:
Inventors:
OGIWARA SEI
Application Number:
JP18593280A
Publication Date:
July 07, 1982
Filing Date:
December 26, 1980
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F13/14; G06F15/16; G06F15/167; G06F15/177; (IPC1-7): G06F15/16