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Title:
MULTIPLE-REFLECTION COMPENSATION CIRCUIT
Document Type and Number:
Japanese Patent JP2011223538
Kind Code:
A
Abstract:

To easily obtain a waveform of high quality by investigating the cause of multiple reflection and finding a method of avoiding it, although a signal transmission method called a tournament system in which one line is wired from one driver halfway up to a plurality of loads and branched from halfway to be distributed to the plurality of loads is replaced with an equivalent circuit in which a plurality of lines of different characteristic impedance are cascaded and extremely complicated waveform disorder due to multiple reflection is caused.

A transfer function when the plurality of lines of different characteristic impedance are cascaded is complicated and it seems difficult to apply the transfer function to an actual circuit even when an inverse function thereof is mathematically found. The inverse function, however, is a simple expression represented by addition and subtraction such that, for example, a simple time lag and weight like [formula 8] are added to an original signal ν10(t), so flat frequency characteristics are obtained and further disorder-free waveform transmission is performed.


Inventors:
USUI YUZO
Application Number:
JP2010104421A
Publication Date:
November 04, 2011
Filing Date:
April 13, 2010
Export Citation:
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Assignee:
USUI YUZO
International Classes:
H04B3/04; H04L25/02
Domestic Patent References:
JP2007096513A2007-04-12
JP2003218753A2003-07-31
JP2007096513A2007-04-12
Foreign References:
WO2006001301A12006-01-05