Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTIPLE SEPARATOR
Document Type and Number:
Japanese Patent JPH06261300
Kind Code:
A
Abstract:

PURPOSE: To improve transfer efficiency by making an effective use of an ID code in the multiplex and separation of auxiliary data to a digital video signal.

CONSTITUTION: A line detection circuit 1 detects a bit width selection signal B showing a period of time when an 8-bit width VANC exists from the EVA and SAV of a multiplex video signal A and an auxiliary data header detection circuit 2 detects an auxiliary data header and outputs an ID timing signal C showing the timing of the data ID to the respective auxiliary data processing circuits. Each of auxiliary data processing circuits 3, 4, and 5 extracts the ID of auxiliary data from the multiplex video signal A by the ID timing signal C. When the bit width selection signal B is 'L', the extracted ID is left as it is. When it is 'H', the low-order 2 bits of the etracted ID is made as 00 to detect the coincidence with the ID of the auxiliary data for which each auxiliary data processing circuit handles.


Inventors:
NAKAMURA KAZUHIKO
Application Number:
JP4473393A
Publication Date:
September 16, 1994
Filing Date:
March 05, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04J3/00; H04N7/08; H04N7/081; H04N7/083; H04N7/084; H04N7/085; H04N7/087; H04N7/088; (IPC1-7): H04N7/08; H04J3/00; H04N7/087; H04N7/093
Attorney, Agent or Firm:
Akira Kobiji (2 outside)