Title:
MULTIPLEX DIGITAL/ANALOG CONVERTER
Document Type and Number:
Japanese Patent JP3308598
Kind Code:
B2
Abstract:
PURPOSE: To prevent the generation of the considerable change of DC voltage in an output terminal in a converter where the amplitude of an output signal depends on the size of current to be supplied.
CONSTITUTION: An R-2R chain circuit network has n+m-pieces of nodes V. Then, n+m-th node Vv+m generates an analog signal. First current mirror circuits TO1 and T1-T3 generating constant first current I1 which can switch 1+m to n+m-th nodes are provided. First current is switched to the node where the allocated bit has a first state. Second current mirror circuits TO2, TO3 and T1'-T3' generating constant second current I2 which is larger than the first current of the first current mirror circuit and which can switch 1 to n-th nodes are provided. Then, second current is switched to the node where the allocated bit has a second state.
Inventors:
Jorg Velvel
Klaus Clener
Klaus Clener
Application Number:
JP24355892A
Publication Date:
July 29, 2002
Filing Date:
September 11, 1992
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
H03M1/08; G06J1/00; H03M1/78; H04N5/57; (IPC1-7): H03M1/78; H03M1/08; H04N5/57
Other References:
【文献】米国特許3857021(US,A)
【文献】米国特許4064506(US,A)
【文献】米国特許4168528(US,A)
【文献】国際公開81/33(WO,A1)
【文献】米国特許4064506(US,A)
【文献】米国特許4168528(US,A)
【文献】国際公開81/33(WO,A1)
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)
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