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Title:
MULTIPLEX DEMODULATION DEVICE
Document Type and Number:
Japanese Patent JPS62109440
Kind Code:
A
Abstract:

PURPOSE: To eliminate a secular change, etc. and to improve the reliability of a multiplex demodulating device by forming a circuit of a digital constitution and attaining the conversion of a filter part into an LSI, the reduction of the number of control processes or an automatic control system.

CONSTITUTION: A digital BPF 2 which samples a pilot signal out of the multiplex signal sent from an input terminal 1 is provided together with a multiplier circuit 3 which squares the output signal of the BPF 2, a digital low cut filter 4 which deletes the DC component of said output signal, a delay unit 5 which deletes the DC component of said output signal, a delay unit 5 which delays the highest bit data of the output signal by a prescribed time, a digital LPF 6 which samples a composite signal out of the multiplex signal, and a gate circuit 7 which switches the output of the LPF 6 by the output signal of the unit 5. In such a constitution, it is possible to convert a large-scale filter part of an analog circuit into an LSI and to decrease the control processes or attain an automatic control system. Thus the secular change is omitted and the reliability is improved for a multiplex demodulating device.


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Inventors:
SOBASHIMA AKIRA
Application Number:
JP24922385A
Publication Date:
May 20, 1987
Filing Date:
November 07, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04H40/45; H04H40/54; H04H1/00; (IPC1-7): H04H5/00
Domestic Patent References:
JPS5213703A1977-02-02
JP60139358B
JPS57152723A1982-09-21
JPS5938779A1984-03-02
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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