Title:
MULTIPLEXER
Document Type and Number:
Japanese Patent JPH06209246
Kind Code:
A
Abstract:
PURPOSE: To extend the frequency range of a divider by providing a control means which switches selection of a first multiplexer at each time of the start of an odd rank of a switching signal and switches selection of a second multiplexer at each time of the start of an even rank of the switching signal. CONSTITUTION: A multiplexer MUX1 is switched at the trailing edge of an odd rank of a switching signal O and a multiplexer MUX2 is switched at the trailing edge of an even rank of the signal O by a control circuit 32 which controls switching from a current input signal Si to the following input signal Si+1 . Further, a signal SW given to a latch 30 is switched at the leading edge of the signal O, and the new state of the signal SW is transmitted to selection inputs of multiplexers MUX3 and MUX4 and output signals are inverted only when an output signal O2 of the multiplexer MUX4 has a start edge. In this constitution, initial states of latches 30 of switched multiplexers MUX1 and MUX2 whose outputs are selected by the multiplexer MUX4 are selected before the leading edge of the signal O, and thereby, the signal Si is given by an output O1 and the signal Si+1 is given by the output O2.
Inventors:
FUREDERITSUKU RUMEERU
Application Number:
JP27023693A
Publication Date:
July 26, 1994
Filing Date:
October 28, 1993
Export Citation:
Assignee:
SGS THOMSON MICROELECTRONICS
International Classes:
H03K5/00; G06F1/025; H03K17/00; H03K23/68; (IPC1-7): H03K17/00; H03K5/00
Attorney, Agent or Firm:
Fukami Hisaro (3 outside)
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