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Patent Searching and Data


Title:
MULTIPLEXING SYSTEM FOR COMMON AREA
Document Type and Number:
Japanese Patent JPS63317863
Kind Code:
A
Abstract:

PURPOSE: To perform a double writing job for a common area only and to realize the effective application of a memory by providing two address conversion tables for conversion of virtual addresses into real addresses and referring to a common bit contained in a 1st conversion table for identification of the common area.

CONSTITUTION: A logical address supplied to a logical address register 111 is converted into a real address stored in a main memory 300 by a 1st address conversion table 112 and also into a real address stored in a main memory back-up device 320. The real address obtained from the table 112 is unconditionally transferred to a physical address register 114. Then an address signal converted via a 2nd address conversion table 113 is transmitted to the register 114 for transfer of the same data when a transfer end signal is sent to a register 117 and only when a signal is received by an access control circuit from an AND circuit 123.


Inventors:
KATADA HISASHI
YOSHIZAWA YASUFUMI
KURIYAMA SHIHOU
Application Number:
JP15329987A
Publication Date:
December 26, 1988
Filing Date:
June 22, 1987
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Katsuo Ogawa