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Title:
MULTIPLICATION ACCUMULATOR
Document Type and Number:
Japanese Patent JPS5386134
Kind Code:
A
Abstract:
Multiplier accumulator device for performing the algebraic sum SIGMA +/- AiBi of products of n-bit operands expressed in two's complement form. The accumulator is divided in two n-position halves, and the rightmost position of the accumulator is linked to the leftmost position. The product partial sums are alternately accumulated into the left and right halves in such a manner that partial products of like weight are added together. Each position of the accumulator is an adding cell except the leftmost positions of the right and left parts which are subtractive cells.

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Inventors:
ANRI PIEERU DEYUBOOSHIERU
ROORAN EDOWAARU KUUNU
BERUNAARU PIEERU ROORAN
Application Number:
JP13482977A
Publication Date:
July 29, 1978
Filing Date:
November 11, 1977
Export Citation:
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Assignee:
IBM
International Classes:
G06F17/16; G06F7/50; G06F7/509; G06F7/544; (IPC1-7): G06F7/38; G06F7/39



 
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