PURPOSE: To obtain a multiplying circuit having small power consumption and a fixed duty without using a delay circuit by inserting a resistance between two MOSTRs to constitute a CMOS inverter and obtaining an AND between the signal of one side of both ends of the resistance and the NOT of the other signal to multiply the frequency.
CONSTITUTION: A sine wave (a) is applied to the gates of MOSTR 6 and 7 of a CMOS inverter, an AND circuit 8 obtains an AND between a signal (c) emerging at the drain of the TR7 and the NOT of a signal (b) emerging at the source of the TR6. Thus an output (d) is obtained. Both TRs6 and 7 are turned on at an olique line area of the wave (a) and therefore the value of the output (d) is set at "1". For areas other than the oblique line area of the wave (a), the TRs6 is off and 7 is on at the top part of the wave (a) to satisfy (b)=(c)="0". While (b)=(c)="1" is satisfied at the bottom part of the wave (a). Then both TRs deliver (d)="0". Therefore a rectangular wave output (d) is obtained by doubling the frequency of the wave (a). In addition, the duty of the pulse width of an output waveform is secured in response to the threshold voltages of TRs6 and 7 set previously even though the input frequency varies. Then the current consumed at the oblique line area of the wave (a) can be reduced by setting properly the value of a resistance 5. Thus the power consumption is reduced for a frequency multiplying circuit.
SUZUKI KATSUMI