To minimize the increase of a waiting time due to the occupancy of a hardware resource and the competition of a logical resource accompanied with the increase of the number of processors, and to improve the maximum performance of the hardware resource by providing a shared memory for operating the exclusive shared control of a resource, and excluding a multiprocessor by an access unit, 1 word from a processor to a memory.

At the time of executing data transfer to a data storage area 23 on a cache, a processor 21 declares that a processor 21 occupies the data storage area 23 on the cache. A processor exclusive control word for each data storage area 23 on the cache is provided on a shared memory 22 so that the processor 21 can operate the exclusive shared control of the data storage area 23 on the cache. This processor exclusive control word is provided with one bit lock, and when the processor 21 ensures the processor exclusive control word, '1' is indicated, and otherwise, '0' is indicated.