Title:
MULTIPROCESSOR SYSTEM
Document Type and Number:
Japanese Patent JPH0652130
Kind Code:
A
Abstract:
PURPOSE: To permit the other processor connected to a common bus to back up the function of a processor where a fault occurs so as to continue the processing of a system.
CONSTITUTION: When the fault occurs in SVP1 by using an SVP error signal 8 or a CPU error signal 7 which become significant according to whether an SVP function is in the middle of execution or not when the fault occurs in SVP1 or CPU 2, 3 and 4, CPU 2, 3 and 4 back up the SVP function in accordance with a previously set order, and the CPU error signal 7 from other CPU 2, 3 and 4 is detected. CPU 2, 3 and 4 outputting the CPU error signal 7 is detached in accordance with the content of the fault.
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Inventors:
HARUTA MASATOSHI
Application Number:
JP20340792A
Publication Date:
February 25, 1994
Filing Date:
July 30, 1992
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F11/20; G06F15/16; G06F15/177; (IPC1-7): G06F15/16; G06F11/20
Attorney, Agent or Firm:
Takada Mamoru
Next Patent: FAULT DETECTION SYSTEM FOR COMPOSITE SYSTEM