PURPOSE: To facilitate the revision of a setting value N without increasing the circuit scale.

CONSTITUTION: The N-ary counter is provided with a decoder decoding the count of a counter 10 and outputting a signal to output lines L1, L2, L3, L4 corresponding to the decoded value reaching plural preset setting values N1, N2, N3, N4 and with a changeover switch 14 selecting one of the plural output signals of the decoder and using the selected signal for a reset signal to the counter 10. The decoder of the N-ary counter is made up of a ROM 20 using the count of the counter 10 as an address and storing data in advance corresponding to output signals to the changeover switch 14 to data areas whose addresses are the setting values N1, N2, N3, N4. Thus, the circuit scale is made smaller than that of a conventional embodiment in which the decoder is made up of gate circuits. Furthermore, since the setting values N1, N2, N3, N4 are revised by having only to rewrite the data in the ROM, the revision is made easier than that of a conventional embodiment where the gate circuit has been revised.