PURPOSE: To improve the performance of an application which necessitates using plural read modify write functions.

CONSTITUTION: A memory cell 1 has two address inputs and two data buses, and simultaneously enables the read/write access to different addresses. A register 5 applies an add constant to an adder 6, and sets a value from a write data bus 2. A read address register 7 stores a read address at the time of reading data from a memory cell 1, and an initial value is set from the write data bus 2, and afterwards the value obtained by adding the value of the read register 7 with the value of the register 5 by the adder 6 is set. The read data are outputted from a read data bus 3 to an outside. A write address bus 4 inputs a write address to the memory cell 1, and a control circuit 8 receives a control signal 9 of an outside input, and controls the entire main memory elements.