PURPOSE: To easily perform inspection wherein high-speed operation is performed by inputting a clock signal from outside by providing a clock switching circuit and supplying the external clock signal to the inside not through a clock signal generating circuit at the time of the inspection.
CONSTITUTION: When the integrated circuit 10 is inspected, a control signal of 'H' level is inputted to an external terminal 21 and the clock signal CLK2 is inputted from an external terminal 20. At this time, an AND gate 24 passes the clock signal CLK2 in the clock switching circuit 19. Therefore, the clock signal CLK2 inputted from the external terminal 20 is supplied into the integrated circuit through the switching circuit 19. Thus, the clock signal which is inputted from outside does not pass through the clock signal generating circuit 18, so the clock can be supplied into the integrated circuit without shifting in phase nor lagging.
JP2008251070 | SEMICONDUCTOR STORAGE DEVICE |
JP2538074 | [Title of Invention] Logical Integrated Circuit |
MOCHIZUKI SACHIYO
TOSHIBA MICRO ELECTRONICS