PURPOSE: To avoid the interference of a serial bit and rewriting of a defective bit.

CONSTITUTION: A video like random access memory, provided with a serial resistor 120 having a serial resistor tap address device, is included in a data processing unit. The tap address is decoded from a column address factor, applied to a data gate relating to steps 200-203 of the serial resistor, and data are accessed from steps of the serial resistor. A step selecting signal is generated with a decoder 160 in response to a code word. A data gate existing between steps 200-203 of the serial resistor and data lines 205-208 is controlled with the step selecting signal. The step selecting signal is made capable with plural code word gates 148, interleave arraying in the input of the decoder and responding to a control pulse 149, only when the control pulse 149 is acting.