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Title:
INTEGRATED MEMORY CIRCUIT FOR PICTURE PROCESSING
Document Type and Number:
Japanese Patent JPH0730903
Kind Code:
A
Abstract:

PURPOSE: To make the size small by decreasing number of pins of a signal processing circuit using the picture processing integrated memory circuit.

CONSTITUTION: A picture element value of a picture equivalent to two frames is stored in a memory cell 12 and it is read based on an address of a 2-dimension block given from address controllers 13A, 13B. The picture elements in the block of two read pictures are added adaptively at a proper ratio by an adder means 20 and an inter-picture prediction signal and an interpolation signal obtained from the result are outputted externally from a data output terminal 11.


Inventors:
SUGIYAMA KENJI
Application Number:
JP19517093A
Publication Date:
January 31, 1995
Filing Date:
July 12, 1993
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N5/92; G06T1/60; G06T9/00; H04N19/42; H04N19/423; H04N19/44; H04N19/50; H04N19/577; H04N19/587; H04N19/61; H04N19/625; H04N19/85; H04N19/91; H04N5/46; (IPC1-7): H04N7/32; G06T1/60; G06T9/00; H04N5/92
Domestic Patent References:
JPH04105487A1992-04-07
JPH04189093A1992-07-07



 
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