MANUFACTURE OF SEMICONDUCTOR DEVICE - SUMITOMO ELECTRIC INDUSTRIES

Title:

MANUFACTURE OF SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JPH0513409

Kind Code:

A

Abstract:

PURPOSE: To furnish a semiconductor device manufacturing method with which the layer to be processed, which is mainly composed of Au, can be processed easily without generation of burrs.

CONSTITUTION: A Ti layer 13 of the prescribed thickness is formed on a wiring layer 12 which is mainly composed of Au. A resist layer 14 is formed on the above-mentioned Ti layer 13, and the resist layer 14 is patterned. Using this patterned resist layer 14 as a mask, the Ti layer 13 is selectively removed by a RIE method. The patterned resist layer 14 is removed, and the wiring layer 12 is selectively removed by an ion-milling method using the exposed Ti layer 13 as a mask.

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Inventors:

HASEGAWA YOSHIMICHI

Application Number:

JP15890091A

Publication Date:

January 22, 1993

Filing Date:

June 28, 1991

Export Citation:

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Assignee:

SUMITOMO ELECTRIC INDUSTRIES

International Classes:

H01L21/302; H01L21/3065; H01L21/3205; (IPC1-7): H01L21/302; H01L21/3205

Attorney, Agent or Firm:

Yoshiki Hasegawa (3 outside)

Next Patent: WAFER MANUFACTURING PROCESS