Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH0738011
Kind Code:
A
Abstract:
PURPOSE: To inexpensively provide a high speed LSI package wherein inductance of a power supply passage is reduced.
CONSTITUTION: A QFP that includes a semiconductor chip on which a high speed LSI is formed has a wiring structure in which two output buffers adjacent each other in the semiconductor chip 1 share a Vss wiring 4a and two signal wirings 4c are arranged which are connected with the two output buffers on opposite sides of the Vss wiring 4a, respectively putting the wiring 4a therebetween.
Inventors:
NAKAMURA ATSUSHI
SAITO YASUYUKI
NISHI KUNIHIKO
OTSUKA KANJI
MIWA TAKASHI
SAITO YASUYUKI
NISHI KUNIHIKO
OTSUKA KANJI
MIWA TAKASHI
Application Number:
JP15774893A
Publication Date:
February 07, 1995
Filing Date:
June 29, 1993
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/60; H01L23/12; H01L23/50; (IPC1-7): H01L23/12; H01L21/60; H01L23/12; H01L23/50
Attorney, Agent or Firm:
Yamato Tsutsui
Next Patent: PGA TYPE PACKAGE AND FABRICATION THEREOF