Title:
【発明の名称】キャッシュメモリのデータ管理方法およびキャッシュ制御装置
Document Type and Number:
Japanese Patent JP3083530
Kind Code:
B2
Abstract:
PURPOSE:To hit a cache memory to an output instruction to be followed up when an input instruction due to a successive access purposes updating by preventing a data management unit from being immediately defined as the object of the most preferential abandonment when the data management unit is preferentially abandoned. CONSTITUTION:When data to be inputted according to the input instruction of a host device such as a central processing unit 101, etc., are in a successive access file, all the data in the data management unit including the input data are accessed and afterwards, the data management unit is not defined as the object of the most preferential abandonment but defined as an object to be preferentially abandoned. Namely, the data management unit is not defined immediately as the object of the abandonment but defined as the object of the abandonment while providing a slight postponement. Thus, the successively accessed data can stay in a cache memory 105 for a while data after the host device 101 issues the input instruction, the output instruction to be followed up can be hit through time to be spent for an update processing or delay time caused by competition, etc., between the other host device and a controller or a disk drive.
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Inventors:
Yoshihiro Azumi
Akira Yamamoto
Katsunori Nakamura
Yoshinori Kuwahara
Shigeo Homma
Akira Yamamoto
Katsunori Nakamura
Yoshinori Kuwahara
Shigeo Homma
Application Number:
JP23513889A
Publication Date:
September 04, 2000
Filing Date:
September 11, 1989
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
G06F12/08; G06F3/06; G06F12/12; (IPC1-7): G06F12/08; G06F3/06; G06F12/12
Domestic Patent References:
| JP6045855A | ||||
| JP61290555A | ||||
| JP57167190A | ||||
| JP1253024A | ||||
| JP58127260A | ||||
| JP63249242A | ||||
| JP61126352U |
Attorney, Agent or Firm:
Kazuko Tomita