Title:
【発明の名称】基準信号作成回路
Document Type and Number:
Japanese Patent JP2584309
Kind Code:
B2
Abstract:
This reference signal producing circuit includes circuits (3, 5) for separating a vertical synchronizing signal from a composite synchronizing signal, a timer (25) reset by a reference signal, a circuit (26) for comparing an output of the timer with a variable set value and producing a compensation signal having a variable period, and a reference signal output circuit (23) for supplying as a reference signal the separated vertical synchronizing signal or the compensation signal. Although the period of the compensation signal is usually set to a value slightly larger than that of a vertical synchronizing signal period, it is set to a value equal to the vertical synchronizing signal period in the case that the vertical synchronizing signal pulses within the composite synchronizing signal lack successively.
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Inventors:
URAGAMI TOYOZO
Application Number:
JP2294189A
Publication Date:
February 26, 1997
Filing Date:
January 31, 1989
Export Citation:
Assignee:
SANYO DENKI KK
International Classes:
G11B15/467; G11B15/473; H04N5/93; H04N5/10; H04N5/932; H04N5/94; (IPC1-7): H04N5/93; H04N5/10
Domestic Patent References:
| JP6178489U |
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)