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Title:
PREVENTING METHOD FOR PROGRAM RUNAWAY OF ARITHMETIC PROCESSOR
Document Type and Number:
Japanese Patent JPH0566970
Kind Code:
A
Abstract:

PURPOSE: To improve the program runaway preventing rate by forming the storing address of a fault processing program with the bit value with which the values divided from the storing address are equal to each other.

CONSTITUTION: The value of the program head storing address to be stored in an interruption vector table is divided into two values and stored in the two continuous address areas. The numerical value '12' (H) is previously stored in common in each address of the unused areas of the vector table. Meanwhile the program to be carried out with occurrence of an interruption fault is stored in an address '1212H' of a program memory. Under such conditions, an arithmetic processor reads the stored values successively from an address OCH to an address ODH and successively from the address ODH to an address OEH respectively when the runaway occurs while the arithmetic processor is carrying out a normal processing program. Even in sich a case, the program head address which is set by the arithmetic processor for reading is equal to '1212H'.


Inventors:
SAITO YUTAKA
Application Number:
JP23013291A
Publication Date:
March 19, 1993
Filing Date:
September 10, 1991
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
G06F11/30; (IPC1-7): G06F11/30
Attorney, Agent or Firm:
Yoshikazu Tani (1 person outside)