PURPOSE: To provide a redundant binary/binary conversion circuit including a rounding processing only by the addition of a few circuits and the increase of a few delay to the redundant binary/binary conversion circuit.

CONSTITUTION: An addition necessary for the rounding processing is operated based on a redundant numerical expression by a redundant binary adder 1 for the rounding processing. The transmission of a carry can be limited by the addition operated based on the redundant numerical expression, so that a high parallel property can be realized without necessitating a large-scaled carry preparing circuit indispensable to a binary high speed parallel adder. Then, the redundant binary expression is converted into a binary by a redundant binary/binary conversion circuit 2, and the number of the digits necessary for the rounding processing is limited by a number of digit limiting circuit 3 for the rounding processing based on the binary expression. The characteristic of the round-down of the digits of the redundant numerical expression is different from that of the binary due to the redundancy, and then the round-down of the digits of the redundant numerical expression is operated after the redundant numerical expression is converted into the binary.