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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH0521747
Kind Code:
A
Abstract:

PURPOSE: To promote further integration and enhance electric properties in a semiconductor integrated circuit device having a memory cell of DRAM and reduce the number manufacturing processes in terms of a manufacturing method of the semiconductor integrated circuit device.

CONSTITUTION: In a semiconductor integrated circuit device having a memory cell of DRAM, a silicon oxide film 8, a field plate electrode 7, and a plate electrode 7, a charge accumulation insulation film 8 and an accumulated electrode 10 are buried respectively in a first recess 4 and a second recess 4 which are different in their width and continuous in shape. This construction makes it possible to reduce a plane layout area of a device-to-device isolation region and enhance insulation isolation characteristic. There is no need to install a thermal oxide film between a connection wiring and word line 14. It is, therefore, possible to use manufacturing process of an information accumulation capacity device C which can also serve in the formation of a device isolation region.


Inventors:
UCHIYAMA HIROYUKI
Application Number:
JP17373291A
Publication Date:
January 29, 1993
Filing Date:
July 15, 1991
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L21/76; H01L21/822; H01L21/8242; H01L27/04; H01L27/10; H01L27/108; (IPC1-7): H01L21/76; H01L27/04; H01L27/108
Attorney, Agent or Firm:
Akita Aki