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Patent Searching and Data


Title:
CONNECTION CIRCUIT BETWEEN SEMICONDUCTOR INTEGRATED CIRCUITS
Document Type and Number:
Japanese Patent JPH0750574
Kind Code:
A
Abstract:

PURPOSE: To provide a connection circuit which secures connection between two semiconductor integrated circuits of CMOS constitution which can transmit signals at a high speed.

CONSTITUTION: An output circuit serving as a semiconductor integrated circuit of CMOS constitution constructs two push-pull amplifiers having four N channel MOS transistors MN1-MN4. These two amplifiers transmit the positive output and the negative output respectively. An output terminal OD1 is connected to an input terminal ID2 and also to a power supply via a termination resistor R1. An input terminal ID3 of an input circuit 20 containing a differential amplifier 21 of CMOS constitution is connected to an output terminal OD2 of an output circuit 10 and also to a ground potential via a termination resistor R3. A connection line connected to the terminal ID2 of the circuit 20 is connected to a connection line connected to the ID3 of the circuit 20 via a termination resistor R2. In such a constitution, the output logical amplitude of the circuit 10 is reduced less than the power supply voltage. Then both rise and fall times are reduced and the signals can be transmitted at a high speed.


Inventors:
AOKI YASUSHI
UNO KOSUKE
Application Number:
JP19338693A
Publication Date:
February 21, 1995
Filing Date:
August 04, 1993
Export Citation:
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Assignee:
NEC CORP
NIPPON DENKI TELECOM SYST
International Classes:
H03K19/0185; H03K19/017; (IPC1-7): H03K19/0185; H03K19/017
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)