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Title:
SUPERCONDUCTING TRANSISTOR
Document Type and Number:
Japanese Patent JPH077190
Kind Code:
A
Abstract:

PURPOSE: To facilitate the manufacturing while enhancing the reproducibility and reliability by applying a voltage to the gate electrode while placing a superconducting transistor in an external magnetic field to modulate the flux restriction force in the center of capturing thereby controlling the critical value of superconducting current flowing between the source and gate.

CONSTITUTION: Multiple crystal grain boundaries are provided, as the center for capturing the magnetic flux, in the channel region layer of an oxide superconductor layer 20. When the energy imparted to the magnetic flux by the current flowing between the source and drain exceeds the restriction force, the flux restricted to the center of capture begins to shift in a predetermined direction. Consequently, the oxide superconductor layer 20 makes a transition to normal conducting state. When a voltage is applied to the gate electrode 23 formed on the channel region layer of the oxide superconductor layer 20, the width of spatial charge layer varies to modulate the Up. Consequently, the current level (critical level) produced by the source/drain voltage varies according to the variation of gate voltage thus realizing the voltage driven operation of the superconducting transistor.


Inventors:
MATSUI TOSHIYUKI
SUZUKI TAKESHI
KIMURA HIROSHI
OI AKIHIKO
KOE KAZUO
Application Number:
JP14307593A
Publication Date:
January 10, 1995
Filing Date:
June 15, 1993
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L39/22; (IPC1-7): H01L39/22
Attorney, Agent or Firm:
Minoru Yamada