Title:
CHIP-TYPE SOLID-STATE ELECTROLYTIC CAPACITOR
Document Type and Number:
Japanese Patent JP3080880
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a chip-type solid-state electrolytic capacitor of resin-mold structure which is free from positional deviation caused by directional deviation that occurs when a negative and a positive outer terminal are bent and possessed of the outer terminals which are easily bent, high in mechanical strength, and excellent in connection reliability,
SOLUTION: A negative and a positive outer terminal, 15 and 13, are formed of metal band constant in width. The terminals 13 and 15 are led out of a molded resin body 16 at spots the nearest to a capacitor element 2, bent extending along the surface of the resin body 16, and set to make heir parts after their bends serve as connecting parts connected to the outside. As a distance between the bending spot and the connecting part of a terminal is short, the terminals deviate less in direction. When a terminal is bent upwards along the end face of the resin body 16, it grows wider in contact area with the outside, so that, it can be enhanced in connection reliability. Moreover, a cutout hole is provided to the terminal at a spot distant from a lead-out position in an extending direction, and a projection which is fitted in the cutout hole is provided to the resin body, whereby the terminal is corrected for directional deviation of bending and enhanced in positional accuracy.
More Like This:
Inventors:
Kenichi Takahashi
Application Number:
JP13668096A
Publication Date:
August 28, 2000
Filing Date:
May 30, 1996
Export Citation:
Assignee:
Toyama NEC Corporation
International Classes:
H01G9/004; H01G9/012; H01G9/08; (IPC1-7): H01G9/004; H01G9/012; H01G9/08
Domestic Patent References:
| JP6066807A | ||||
| JP6094820U |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)