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Patent Searching and Data


Title:
SWITCH CIRCUIT
Document Type and Number:
Japanese Patent JPH0723308
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of elements in a switch circuit for an ODS circuit by generating an input signal from an output terminal when the input signal is higher than a 1st reference voltage and generating the 2nd reference voltage from the output terminal when the input signal is lower than the 1st reference voltage.

CONSTITUTION: When a chroma signal is inputted to an input trerminal 29, a TR 13 is turned off, a TR 14 is turned on and the voltage of a point C is dropped to 3V or less. The voltage of a point B is 3V, TR 18 is turned on and a TR 19 is turned off. Thereby a voltage follower circuit consisting of TRs 18, 20, 30 and a current mirror circuit 15 is actuated and 3V DC voltage indicating a silence is generated from an output terminal 21. Even when emitter voltage drops at the On of the TR 14, a current mirror circuit 31 is not saturated. When the input terminal 29 reaches 5V, the TR 14 is turned off, both of the TRs 10, 13 act as an emitter-follower circuit and a chroma signal higher than 3V is generated from the point C. Then the TR 18 is turned off, the TR 19 is turned on, a voltage follower circuit consisting of the TRs 19, 20, the circuit 15 and the TR 30 is actuated, and a chroma signal equal to the one from the point C is generated from the output terminal 21.


Inventors:
ARAI HIROMI
Application Number:
JP15957793A
Publication Date:
January 24, 1995
Filing Date:
June 29, 1993
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H03K17/62; H04N5/445; (IPC1-7): H04N5/445; H03K17/62
Attorney, Agent or Firm:
Takuji Nishino