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Patent Searching and Data


Title:
VERTICAL MOS SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH088422
Kind Code:
A
Abstract:

PURPOSE: To make the ratio of a main current to a detection current constant, by forming a second conductivity type well region connected to a sense cell part emitter electrode between a main cell part and a sense cell part.

CONSTITUTION: An emitter electrode is formed in such a way that an emitter electrode 14 in a main cell part 6 and an emitter electrode 15 in the sense cell part 7 are isolated from each other. The main cell part 6 and a sense cell part 7 are laid out to keep a distance L. Between the part 6 and the part 7, a P well 17 connected to the emitter electrode 14 in the main cell part 6 for capturing minority carrier, and a P well 18 connected to an emitter electrode 15 in the sense part 7 are formed. The P well 17 captures minority carriers diffusing from the sense cell part 7 toward the main cell part 6. The P well 18 captures minority carriers diffusing from the main cell part 6 toward the sense cell part 7. Thereby the leak current caused by the minority carriers between the main cell part and the sense cell part can be reduced, and the ratio of a main current to a detection current can be kept constant.


Inventors:
YAMAZAKI TOMOYUKI
OHINATA SHIGEYUKI
OTSUKI MASATO
MOMOTA SEIJI
FUJIHIRA TATSUHIKO
Application Number:
JP13974894A
Publication Date:
January 12, 1996
Filing Date:
June 22, 1994
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L29/78; H01L21/76; H01L27/02; H01L27/04; H01L29/10; H01L29/739; (IPC1-7): H01L29/78
Attorney, Agent or Firm:
Iwao Yamaguchi