Title:
【発明の名称】半導体記憶装置の製造方法
Document Type and Number:
Japanese Patent JP2606857
Kind Code:
B2
Abstract:
A semiconductor memory comprises a switching device and a charge-storage device disposed at the upper and lower sides, respectively, of each of semiconductor islands. The islands are formed on a semiconductor substrate that is completely isolated from the semiconductor substrate by an insulator. The switching device and charge-storage device are substantially the same width. The memory cell structure is extremely small. The cell structure is highly resistant to alpha-particles and is formed self-aligned. During manufacture, the SiO2 island is oxidized adjacent its lower end to insulate the island from the substrate.
Inventors:
Tohru Kaga
Yoshimoto Kawamoto
Hideo Sakunan
Yoshimoto Kawamoto
Hideo Sakunan
Application Number:
JP31082187A
Publication Date:
May 07, 1997
Filing Date:
December 10, 1987
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
H01L27/04; H01L21/28; H01L21/311; H01L21/334; H01L21/762; H01L21/822; H01L21/8242; H01L27/10; H01L27/108; H01L29/06; H01L29/51; H01L29/78; (IPC1-7): H01L27/108; H01L21/8242
Domestic Patent References:
| JP60137037A | ||||
| JP6072243A | ||||
| JP5919366A |
Attorney, Agent or Firm:
Junnosuke Nakamura