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Patent Searching and Data


Title:
LOGIC CIRCUIT GENERATING SYSTEM
Document Type and Number:
Japanese Patent JPH0567171
Kind Code:
A
Abstract:

PURPOSE: To simplify the processing in the case of insertion of a logic circuit.

CONSTITUTION: This logic circuit generating system is provided with a logic circuit read means 1 which reads in a logic circuit file 7, a macro circuit inserting means 2 which inserts another logic circuit (macro circuit) to the read-in logic circuit, a connection information designating means 3 which designates connection information of the original circuit and the inserted macro circuit, a connection destination deleting means 4 which deletes the circuit made unnecessary by macro insertion from the original circuit, a macro circuit connecting means 5 which connects the macro circuit to the original circuit based on connection information, and a logic circuit means 6 which writes a generated logic circuit in the file.


Inventors:
KUROKI KANAME
Application Number:
JP22933191A
Publication Date:
March 19, 1993
Filing Date:
September 10, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F17/50; (IPC1-7): G06F15/60
Attorney, Agent or Firm:
Uchihara Shin