PURPOSE: To hold the preceding selected state of a processor compulsorily when a state where preferential output designation exists in both processors or no designation exists in both processors for the output of data in a selected processor is set.
CONSTITUTION: This system is provided with a inhibition designated state detecting means 11 which detects the state where the preferential output designation is outputted from both duplexed first and second processors 1, 2 or no designation is outputted from both of them (inhibition designated state), and a processor selection control means 12 which outputs the data from the selected processor by selecting the processor on a side from which the preferential output designation is outputted when the detecting means 11 detects the inhibition designated state, and outputs the data of the processor selected last time by holding the preceding selected state of the processor. As the inhibition designated state detecting means 11, an exclusive OR circuit 21 is used.
JPS564850 | MICROPROGRAM CONTROL UNIT |
WO/2005/114419 | FAULT TOLERANT DATA PROCESSING |
WO/1996/013767 | MULTIPROCESSOR DEVICE COMPRISING A CLOCK SYNCHRONIZATION DEVICE |
SUGIMOTO MOTOAKI
FUJI FACOM CORP