Title:
MULTITASK CONTROLLER
Document Type and Number:
Japanese Patent JPH0546412
Kind Code:
A
Abstract:
PURPOSE: To reduce the memory capacity used for task management and to quickly perform the operation processing of management information with respect to a real time OS of an 8-bit microprocessor.
CONSTITUTION: A task control block(TCB) arranging means 2 is provided which fixedly arranges first, second, and third TCBs 4, 5, and 6 in the area of management addresses 0 to 255 of a memory 3. Lower 8 bits of arrangement address information are preserved by task connection pointers indicating connections of tasks in TCBs 4, 5, and 6 and a connection queue 7 to indicate the other party of connection. By this task connection management, a multitask controller of high speed where the used memory capacity is small is obtained.
Inventors:
TAKEDA TAKASHI
Application Number:
JP22483091A
Publication Date:
February 26, 1993
Filing Date:
August 09, 1991
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F9/46; (IPC1-7): G06F9/46
Attorney, Agent or Firm:
Yoshiki Okamoto
Next Patent: GENERATOR FOR STATIC PICTURE SIGNAL