MONOLITHIC INTEGRATION OF MICROWAVE SILICON ELEMENT, LOW-LOSS TRANSMISSION LINE AND ITS FORMATION METHOD

Title:

MONOLITHIC INTEGRATION OF MICROWAVE SILICON ELEMENT, LOW-LOSS TRANSMISSION LINE AND ITS FORMATION METHOD

Document Type and Number:

Japanese Patent JPH0750339

Kind Code:

A

Abstract:

PURPOSE: To manufacture a monolithic semiconductor device which operates in a microwave band at a low cost by establishing connection between active elements, extending on a high-resistant polysilicon region and interconnection between the elements and electric insulating material on the elements. CONSTITUTION: An n<-1> -layer of silicon 3 is epitaxial-deposited on a wafer 1, then oxide 5 is grown on the silicon layer 3 and patterned, so as to provide a mesa position. Next, an oxide layer 7 is grown on the surface of exposed silicon 1 and 3, and active devices are formed on the mesa. A thick high- resistant polysilicon layer 9 is deposited, and an interconnection 27 between the devices is formed on the polysilicon layer 9 and oxide 11 on the polysilicon layer 9 by a general method. By this arrangement, when the devices are attached to a substrate having a high dielectric constant, e.g. an AlN substrate 35, excellent microwave interconnection can be established.

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Inventors:

SATSUTOUINDAA MARUHI
CHI CHIEONGU SHIEN
OO KIYONGU KUON

Application Number:

JP29845593A

Publication Date:

February 21, 1995

Filing Date:

November 29, 1993

Export Citation:

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Assignee:

TEXAS INSTRUMENTS INC

International Classes:

H01L21/76; H01L21/762; H01L21/768; H01L23/36; H01L23/532; H01L23/66; H01P11/00; (IPC1-7): H01L21/76; H01P11/00

Attorney, Agent or Firm:

Akira Asamura (3 outside)

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