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Title:
NETWORK ANALYZER, NETWORK ANALYTICAL METHOD AND RECORDING MEDIUM WITH RECORDED NETWORK SNALYTICAL PROGRAM
Document Type and Number:
Japanese Patent JP2001272428
Kind Code:
A
Abstract:

To provide a network analyzer in which an error is hard to generate even when an ideal terminating resistance does not exist and which measures DUTs in a plurality of ports.

The network analyzer is provided with a power-supply port 8a which is connected to one measuring port 40a of an object 40 to be measured and to which a power supply 9 is connected. The network analyzer is provided with terminating ports 8b to 8n which are connected to ports 40b to 40n, of the object 40 to be measured, other than the measuring port 8a so as to be grounded via grounding resistances 6a, 6b to 6n. The network analyzer is provided with circuit-parameter measuring parts 20a, 20b to 20n which are connected respectively to the port 8a and the ports 8b to 8n and which measure an S parameter regarding the ports 40a, 40b to 40n. The parts 20a, 20b to 20n which are connected to the ports 8b to 8n measure the S parameter regarding the ports 8b to 8n. Thereby, even when the S parameter regarding the ports 8b to 8n cannot be regarded as 0, the S parameter of the object 40, to be measured, comprising a plurality of ports can be measured.


Inventors:
IIDA MINORU
NAKAYAMA KIWA
WAGATA HIROTAKA
Application Number:
JP2000025394A
Publication Date:
October 05, 2001
Filing Date:
February 02, 2000
Export Citation:
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Assignee:
ADVANTEST CORP
International Classes:
G01R35/00; G01R27/28; (IPC1-7): G01R27/28; G01R35/00
Domestic Patent References:
JPH11352163A1999-12-24
Attorney, Agent or Firm:
Masuda Hosoda