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Title:
NETWORK ANALYZER CIRCUIT
Document Type and Number:
Japanese Patent JPS54145459
Kind Code:
A
Abstract:

PURPOSE: To eliminate the need for the synchronization between the 1st and 2nd chirp signals by adding the 1st chirp signal, whose frequency range has been varied by frequency-mixing by the use of the output of a local oscillator, to the output signal of a measured network.

CONSTITUTION: An impulse is supplied from pulse-signal generator 11 to measured network 12, the output of which is sent to amplitude-characteristic output terminal 18 via mixer 16 and chirp filter 17. At the same time, the output of filter 17 is branched and applied to phase comparator 19. Next, the output of generator 11 is applied to mixer 16 via mixer 22, where frequency mixing is in process by chirp filter 13 and local oscillator 23, and also to phase comparator 19 via mixer 24 and chirp filter 15. Then, the output of comparator 19 is extracted from output terminal 21, so that the analyzable frequency range can be obtained while the need for the synchronization between signals to be phase-comparated is eliminated.


Inventors:
YAMAUCHI YOSHINORI
Application Number:
JP5398078A
Publication Date:
November 13, 1979
Filing Date:
May 06, 1978
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
G01R27/28; H03H1/00; H03H7/18; H03H15/00; H03H17/00; H03L7/06; (IPC1-7): H03H7/18; H03H7/28